Redundancy is used in memory systems to improve manufacturing yield. In memory systems using a layer of cache memory for data transfer, redundancy logic adds additional complexity, requiring the cached data for defective cells in the main array to be routed correctly to the main array or a replacement array. Also, the cache memory is another source of defective cells. A defective cell in the cache memory can render a corresponding row or column of the main array unusable for cache based operations.
It is desirable to provide redundancy in cache based memory systems, which provides for correct data flow to and from the replacement array, and can address potential problems with defective cells in the cache memory.